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3 Commits

Author SHA1 Message Date
Patedam bf91dc1af6 QOL changes to remove squiggle lines everywhere because of a bad clangd config 2026-04-01 22:10:40 -04:00
Patedam 04264ef8e1 fixed comment on the ddx line 2026-03-30 22:52:29 -04:00
Patedam e30fd59f1c fixed using 0xff for white + removed lot of crap from previous tries.
Basicaly 0x50 need 0x29 as data to invert polarity (white 0 -> 1) + CDI-9 for proper interval
2026-03-30 22:27:49 -04:00
5 changed files with 22 additions and 81 deletions
-11
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@@ -1,11 +0,0 @@
{
"folders": [
{
"path": "."
},
{
"path": "../components"
}
],
"settings": {}
}
+1 -2
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@@ -1,6 +1,5 @@
idf_component_register(SRCS "main.cpp" "provider.cpp" idf_component_register(SRCS "main.cpp" "provider.cpp"
PRIV_REQUIRES driver nvs_flash PRIV_REQUIRES driver nvs_flash
esp_event esp_timer esp_event esp_timer
led network http_client mdns led network http_client mdns epd
epd
INCLUDE_DIRS ".") INCLUDE_DIRS ".")
+2 -1
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@@ -11,10 +11,11 @@
} }
], ],
"settings": { "settings": {
"clangd.path": "C:\\Espressif\\tools\\esp-clang\\esp-19.1.2_20250312\\esp-clang\\bin\\clangd.exe",
"clangd.arguments": [ "clangd.arguments": [
"--background-index", "--background-index",
"--query-driver=**", "--query-driver=**",
"--compile-commands-dir=w:\\Classified\\Calendink\\Provider\\build" "--path-mappings=C:/Dev/Classified/Calendink=W:/Classified/Calendink,c:/Dev/Classified/Calendink=w:/Classified/Calendink,C:\\Dev\\Classified\\Calendink=W:\\Classified\\Calendink,c:\\Dev\\Classified\\Calendink=w:\\Classified\\Calendink"
] ]
} }
} }
+17 -65
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@@ -17,7 +17,9 @@ internal void epd_spi_init(void)
{ {
// 1. Initialize the SPI Bus // 1. Initialize the SPI Bus
spi_bus_config_t buscfg = {}; spi_bus_config_t buscfg = {};
buscfg.miso_io_num = TFT_MISO; // Initialize MISO as input, matching `spi.begin(TFT_SCLK, TFT_MISO, TFT_MOSI, -1)` buscfg.miso_io_num =
TFT_MISO; // Initialize MISO as input, matching `spi.begin(TFT_SCLK,
// TFT_MISO, TFT_MOSI, -1)`
buscfg.mosi_io_num = TFT_MOSI; buscfg.mosi_io_num = TFT_MOSI;
buscfg.sclk_io_num = TFT_SCLK; buscfg.sclk_io_num = TFT_SCLK;
buscfg.quadwp_io_num = -1; buscfg.quadwp_io_num = -1;
@@ -119,68 +121,16 @@ void epd_shutdown(void)
spi_bus_free(SPI2_HOST); spi_bus_free(SPI2_HOST);
} }
internal void epd_seeed_init_fast()
{
epd_writecommand(0x01); // POWER SETTING
epd_writedata(0x07);
epd_writedata(0x07); // VGH=20V,VGL=-20V
epd_writedata(0x3f); // VDH=15V
epd_writedata(0x3f); // VDL=-15V
epd_writecommand(0x06); // Booster Soft Start
epd_writedata(0x17);
epd_writedata(0x17);
epd_writedata(0x28);
epd_writedata(0x17);
epd_writecommand(0x04); // POWER ON
vTaskDelay(pdMS_TO_TICKS(100));
epd_wait_until_idle();
epd_writecommand(0X00); // PANEL SETTING
epd_writedata(0x1F); // KW-3f KWR-2F BWROTP 0f BWOTP 1f
epd_writecommand(0x61); // TRES
epd_writedata(EPD_WIDTH >> 8);
epd_writedata(EPD_WIDTH & 0xFF);
epd_writedata(EPD_HEIGHT >> 8);
epd_writedata(EPD_HEIGHT & 0xFF);
epd_writecommand(0x50); // VCOM AND DATA INTERVAL SETTING
epd_writedata(0x10);
epd_writedata(0x07);
epd_writecommand(0xE0); // Active Temperature
epd_writedata(0x02);
epd_writecommand(0xE5); // Input Temperature
epd_writedata(0x55);
}
internal void epd_wakeup()
{
gpio_set_level((gpio_num_t)TFT_RST, 0);
vTaskDelay(pdMS_TO_TICKS(10));
gpio_set_level((gpio_num_t)TFT_RST, 1);
vTaskDelay(pdMS_TO_TICKS(10));
epd_wait_until_idle();
epd_seeed_init_fast();
}
void epd_init_display() void epd_init_display()
{ {
g_is_asleep = false; g_is_asleep = false;
// 1. From initFromSleep() - Put SPI bus in known state for TFT with CS tied low // Module reset
epd_writecommand(0x00);
gpio_set_level((gpio_num_t)TFT_RST, 1);
vTaskDelay(pdMS_TO_TICKS(5));
gpio_set_level((gpio_num_t)TFT_RST, 0); gpio_set_level((gpio_num_t)TFT_RST, 0);
vTaskDelay(pdMS_TO_TICKS(20)); vTaskDelay(pdMS_TO_TICKS(10));
gpio_set_level((gpio_num_t)TFT_RST, 1); gpio_set_level((gpio_num_t)TFT_RST, 1);
vTaskDelay(pdMS_TO_TICKS(150)); // Wait for reset to complete vTaskDelay(pdMS_TO_TICKS(10));
// 2. From init() -> UC8179_Init.h
epd_writecommand(0x01); // POWER SETTING epd_writecommand(0x01); // POWER SETTING
epd_writedata(0x07); epd_writedata(0x07);
epd_writedata(0x07); epd_writedata(0x07);
@@ -210,14 +160,11 @@ void epd_init_display()
epd_writedata(0x00); epd_writedata(0x00);
epd_writecommand(0x50); // VCOM AND DATA INTERVAL SETTING epd_writecommand(0x50); // VCOM AND DATA INTERVAL SETTING
epd_writedata(0x10); epd_writedata(0x29); // BDV=10 (White Border), N2OCP=1 (Auto-copy NEW to OLD), DDX=01 (0=Black, 1=White)
epd_writedata(0x07); epd_writedata(0x07);
epd_writecommand(0x60); // TCON SETTING epd_writecommand(0x60); // TCON SETTING
epd_writedata(0x22); epd_writedata(0x22);
// 3. EPaper::begin(0) then correctly calls EPD_WAKEUP()
epd_wakeup();
} }
void epd_shutdown_display(void) void epd_shutdown_display(void)
@@ -253,15 +200,18 @@ void epd_clear(epd_color_t level)
{ {
assert(!g_is_asleep); assert(!g_is_asleep);
// Directly pass the color preference to hardware (hardware polarity is
// configured in DDX)
uint8 color_byte = static_cast<uint8>(level); uint8 color_byte = static_cast<uint8>(level);
ESP_LOGI(kTagEPD, "Clearing display (byte=0x%02X)", color_byte); ESP_LOGI(kTagEPD, "Clearing display (byte=0x%02X)", color_byte);
constexpr size_t total_bytes = (EPD_WIDTH * EPD_HEIGHT) / 8; constexpr size_t total_bytes = (EPD_WIDTH * EPD_HEIGHT) / 8;
uint8 chunk[256];
memset(chunk, color_byte, sizeof(chunk));
auto write_layer = [&](uint8 cmd) auto write_layer = [&](uint8 cmd, uint8 fill_byte)
{ {
uint8 chunk[256];
memset(chunk, fill_byte, sizeof(chunk));
epd_writecommand(cmd); epd_writecommand(cmd);
size_t remaining = total_bytes; size_t remaining = total_bytes;
int chunk_count = 0; int chunk_count = 0;
@@ -276,8 +226,10 @@ void epd_clear(epd_color_t level)
} }
}; };
write_layer(0x10); // Old data layer write_layer(
write_layer(0x13); // New data layer 0x10,
0xFF); // Old data layer (0xFF is mapped to White under new polarity)
write_layer(0x13, color_byte); // New data layer
ESP_LOGI(kTagEPD, "Data transmission complete (Refresh required)"); ESP_LOGI(kTagEPD, "Data transmission complete (Refresh required)");
} }
+1 -1
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@@ -1,4 +1,4 @@
// DRIVER FOR UC8179 // DRIVER FOR UC8179 + GDEY075T7
#pragma once #pragma once
#include "sdkconfig.h" #include "sdkconfig.h"