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@@ -17,7 +17,9 @@ internal void epd_spi_init(void)
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{
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// 1. Initialize the SPI Bus
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spi_bus_config_t buscfg = {};
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buscfg.miso_io_num = TFT_MISO; // Initialize MISO as input, matching `spi.begin(TFT_SCLK, TFT_MISO, TFT_MOSI, -1)`
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buscfg.miso_io_num =
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TFT_MISO; // Initialize MISO as input, matching `spi.begin(TFT_SCLK,
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// TFT_MISO, TFT_MOSI, -1)`
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buscfg.mosi_io_num = TFT_MOSI;
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buscfg.sclk_io_num = TFT_SCLK;
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buscfg.quadwp_io_num = -1;
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@@ -119,68 +121,16 @@ void epd_shutdown(void)
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spi_bus_free(SPI2_HOST);
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}
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internal void epd_seeed_init_fast()
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{
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epd_writecommand(0x01); // POWER SETTING
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epd_writedata(0x07);
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epd_writedata(0x07); // VGH=20V,VGL=-20V
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epd_writedata(0x3f); // VDH=15V
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epd_writedata(0x3f); // VDL=-15V
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epd_writecommand(0x06); // Booster Soft Start
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epd_writedata(0x17);
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epd_writedata(0x17);
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epd_writedata(0x28);
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epd_writedata(0x17);
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epd_writecommand(0x04); // POWER ON
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vTaskDelay(pdMS_TO_TICKS(100));
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epd_wait_until_idle();
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epd_writecommand(0X00); // PANEL SETTING
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epd_writedata(0x1F); // KW-3f KWR-2F BWROTP 0f BWOTP 1f
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epd_writecommand(0x61); // TRES
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epd_writedata(EPD_WIDTH >> 8);
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epd_writedata(EPD_WIDTH & 0xFF);
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epd_writedata(EPD_HEIGHT >> 8);
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epd_writedata(EPD_HEIGHT & 0xFF);
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epd_writecommand(0x50); // VCOM AND DATA INTERVAL SETTING
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epd_writedata(0x10);
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epd_writedata(0x07);
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epd_writecommand(0xE0); // Active Temperature
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epd_writedata(0x02);
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epd_writecommand(0xE5); // Input Temperature
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epd_writedata(0x55);
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}
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internal void epd_wakeup()
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{
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gpio_set_level((gpio_num_t)TFT_RST, 0);
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vTaskDelay(pdMS_TO_TICKS(10));
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gpio_set_level((gpio_num_t)TFT_RST, 1);
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vTaskDelay(pdMS_TO_TICKS(10));
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epd_wait_until_idle();
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epd_seeed_init_fast();
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}
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void epd_init_display()
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{
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g_is_asleep = false;
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// 1. From initFromSleep() - Put SPI bus in known state for TFT with CS tied low
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epd_writecommand(0x00);
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gpio_set_level((gpio_num_t)TFT_RST, 1);
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vTaskDelay(pdMS_TO_TICKS(5));
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// Module reset
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gpio_set_level((gpio_num_t)TFT_RST, 0);
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vTaskDelay(pdMS_TO_TICKS(20));
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vTaskDelay(pdMS_TO_TICKS(10));
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gpio_set_level((gpio_num_t)TFT_RST, 1);
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vTaskDelay(pdMS_TO_TICKS(150)); // Wait for reset to complete
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vTaskDelay(pdMS_TO_TICKS(10));
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// 2. From init() -> UC8179_Init.h
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epd_writecommand(0x01); // POWER SETTING
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epd_writedata(0x07);
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epd_writedata(0x07);
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@@ -198,7 +148,7 @@ void epd_init_display()
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epd_wait_until_idle();
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epd_writecommand(0X00); // PANEL SETTING
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epd_writedata(0x1F);
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epd_writedata(0x1F);
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epd_writecommand(0x61); // TRES
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epd_writedata(EPD_WIDTH >> 8);
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@@ -210,14 +160,11 @@ void epd_init_display()
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epd_writedata(0x00);
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epd_writecommand(0x50); // VCOM AND DATA INTERVAL SETTING
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epd_writedata(0x10);
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epd_writedata(0x29); // BDV=10 (White Border), N2OCP=1 (Auto-copy NEW to OLD), DDX=01 (0=Black, 1=White)
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epd_writedata(0x07);
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epd_writecommand(0x60); // TCON SETTING
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epd_writedata(0x22);
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// 3. EPaper::begin(0) then correctly calls EPD_WAKEUP()
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epd_wakeup();
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}
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void epd_shutdown_display(void)
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@@ -253,15 +200,18 @@ void epd_clear(epd_color_t level)
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{
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assert(!g_is_asleep);
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// Directly pass the color preference to hardware (hardware polarity is
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// configured in DDX)
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uint8 color_byte = static_cast<uint8>(level);
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ESP_LOGI(kTagEPD, "Clearing display (byte=0x%02X)", color_byte);
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constexpr size_t total_bytes = (EPD_WIDTH * EPD_HEIGHT) / 8;
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uint8 chunk[256];
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memset(chunk, color_byte, sizeof(chunk));
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auto write_layer = [&](uint8 cmd)
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auto write_layer = [&](uint8 cmd, uint8 fill_byte)
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{
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uint8 chunk[256];
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memset(chunk, fill_byte, sizeof(chunk));
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epd_writecommand(cmd);
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size_t remaining = total_bytes;
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int chunk_count = 0;
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@@ -276,8 +226,10 @@ void epd_clear(epd_color_t level)
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}
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};
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write_layer(0x10); // Old data layer
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write_layer(0x13); // New data layer
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write_layer(
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0x10,
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0xFF); // Old data layer (0xFF is mapped to White under new polarity)
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write_layer(0x13, color_byte); // New data layer
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ESP_LOGI(kTagEPD, "Data transmission complete (Refresh required)");
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}
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